Software program engineer Ben C. has constructed a instrument that bridges the worlds of {hardware} description languages (HDLs) with building and administration sim Factorio — bringing chip designs, as much as and together with a working RISC-V processor, into the sport.
“Shortly after Factorio 2.0 launched I noticed that you can in all probability describe combinator circuits as Verilog and have a compiler translate it,” Ben C. explains of the challenge’s inspiration. “Thats what this challenge is. Enter Verilog, output pure vanilla Factorio Blueprints. I took this new launch as a chance to dive into a brand new challenge and a brand new language! At first I used to be simply attempting to study rust and compilers, nevertheless it advanced into a giant software program experiment. I added Lua scripting, a nodes-based GUI (net and native assist with egui), a combinator simulator, graph partitioning, SVG technology, ILP solvers, hyper parameter optimization. Actually its a bag of many issues I used to be all in favour of.”
In case you’ve ever wished you can take a Verilog design and switch it right into a Factorio manufacturing unit, right now is your fortunate day. (📷: Ben C.)
Verilog is a {hardware} description language (HDL), a kind of domain-specific language (DSL) tailor-made to the design of chips — both to be executed in simulation on a pc, was gateware to be used with a field-programmable gate array (FPGA) or different programmable logic gadget, or taped out for manufacturing into an precise bodily application-specific built-in circuit (ASIC). Factorio, in the meantime, launched in 2020 as a building and administration simulation from Wube Software program — and acquired a significant improve, generally known as Factorio 2.0, in 2024.
“To perform this I make use of two applications,” Ben. C explains. “The primary is a front-end compiler to take Verilog and produce a graph of logic which may be roughly translated into Factorio logic. On the finish of this course of we’re left with a combination of fine-grained logic and coarse grain word-level representations. Now Rust enters the image. I now learn this JSON into what I name a ‘MappedDIt’sgn;’ there are some further tweaks to make the format of a MappedDesign extra favorable, nevertheless it’s not that essential. Its basically a deserialized Yosys output.””
“To perform this I make use of two applications,” Ben. C explains. “The primary is a front-end compiler to take Verilog and produce a graph of logic which may be roughly translated into Factorio logic. On the finish of this course of we’re left with a combination of fine-grained logic and coarse grain word-level representations. Now Rust enters the image. I now learn this JSON into what I name a ‘MappedDesign;’ there are some further tweaks to make the format of a MappedDesign extra favorable, however its not that essential. Its basically a deserialized Yosys output.”
The toolchain permits for even advanced designs to be transformed and imported into the sport, together with a 32-bit RISC-V CPU. (📷: Ben C.)
The compilation then turns to bodily planning, utilizing in-game combinators and wiring constructions to construct the design piece-by-piece. “As a result of the routing will place energy poles,” Ben C. explains, “we will reuse them for energy distribution. Very first thing is to find out if every combinator is roofed by an influence distribution space, if some combinators are lacking, I place a brand new pole to maximise protection over lacking areas. Then as soon as I’m happy with protection I do a heuristic based mostly graph traversal to attempt to decrease [the] variety of copper wires whereas additionally ensuring we solely have one energy distribution community. Generally this is not good, however works effectively sufficient. I believe for the RISC-V core I solely wanted to manually place a pair substations to get full protection.”
Extra particulars on the challenge can be found in Ben C.’s Reddit put up, whereas supply code is offered on GitHub beneath the GNU Affero Basic Public License 3; a reside website internet hosting the back-end move “with a GUI slapped on prime,” for simulation and experimentation, is offered on the developer’s web site.